1. Field of the Invention
The present invention relates a DC-DC converter for step-down converting an input DC voltage to a DC voltage having a predetermined value, and more particularly, to a step-down ripple detection type self-oscillation converter.
2. Description of the Related Art
At the present time, low-voltage and high-current DC-DC converters are required because of the demand for computer power-supply circuits. As representatives of such DC-DC converters, PWM control converters and ripple detection type self-oscillation converters (hereinafter, simply referred to as ripple converters) are utilized. Among them, ripple converters have lately attracted some attention even though the later-developed PWM control converters have been overwhelmingly popular, because the response to load variations is good with ripple converters.
FIG. 5 shows a basic circuit of a ripple converter.
As shown in FIG. 5, in the ripple converter, a PNP transistor Tr1 defining a switching element and an inductor L01 which are series connected, are disposed between an input terminal 3 at which an input voltage Vin is input and an output terminal 4 at which an output voltage Vout is output, and a flywheel diode connected between the connection point of the PNP transistor Tr1 to the inductor L01 and the ground is provided. Furthermore, a comparator 10, in which a voltage in accordance with an output voltage Vout is input to a non-inverting input terminal, a reference voltage Vo is input to an inverting input terminal, and a switching control signal is output to the PNP transistor Tr1, is provided.
In such a ripple converter, while the PNP transistor Tr1 is in the off state, when the output voltage Vout becomes less than the reference voltage Vo, a low signal output from the comparator is input to the base of the PNP transistor Tr1 and the PNP transistor Tr1 is turned on. Then, the output voltage Vout increases such that the PNP transistor Tr1 is turned on. On the other hand, while the PNP transistor Tr1 is in the on state, when the output voltage Vout becomes greater than the reference voltage Vo, a high signal is output from the comparator and input to the base of the PNP transistor Tr1, and as a result, the PNP transistor Tr1 is turned off. Then, the output voltage Vout is reduced such that the PNP transistor Tr1 is turned off. By repeating such a control operation, the output voltage Vout goes up and down around a voltage that is close to the reference voltage Vo and an output voltage Vout which substantially equal to the reference voltage Vo is obtained.
In a practical circuit of such a ripple converter disclosed in Japanese Unexamined Patent Application Publication No. 9-51672, a ripple converter having a structure in which a switching element of a Pch FET and a choke coil are connected between an input terminal and an output terminal, and a diode is connected between the connection point of the Pch FET to the choke coil and the ground potential. Furthermore, in the ripple converter described in JP 9-51672, a comparator in which a voltage in accordance with an output voltage is input to an inverting input terminal and a reference voltage is input to a non-inverting input terminal and a drive IC which outputs a switching control signal to the Pch FET in accordance with the output voltage of the comparator are provided. Then, in this ripple converter, a desired output voltage is obtained from input voltage such that the output voltage is compared to a reference voltage and, based on the results of the comparison, the Pch FET is switched.
When compared with Nch FETs, Pch FETs have less desirable characteristics. So if the Pch FET is used in a synchronous rectification type ripple converter, the conversion efficiency is degraded. Therefore, a synchronous rectification type ripple converter using the Nch FET is required, instead of the Pch FET.
In such a ripple converter using an Nch FET, a higher voltage than the source voltage must be applied to the gate in order to drive the FET, and a bootstrap circuit shown in FIG. 6A is typically required on the control signal input side of the Nch FET.
FIG. 6A is a circuit diagram of a synchronous rectification type ripple converter using an Nch FET in which a related bootstrap circuit is provided, and FIG. 6B shows voltage waveforms at fixed points (point A and point B) in the circuit shown in FIG. 6A.
As shown in FIG. 6A, an Nch FET1 (hereinafter, referred to as an FET1) and an inductor L1 are series-connected between an input terminal 3 at which an input voltage Vin is input and an output terminal 4 at which an output voltage Vout is output. A bootstrap circuit including a bootstrap diode D0 and a bootstrap capacitor C0 which are series connected to each other is provided between the drain and source of the FET1. An H/S driver circuit 1 is connected to the gate of the FET1. The voltages at both ends of the bootstrap capacitor C0 are applied to the H/S driver circuit 1. The gate of an Nch FET2 (hereinafter, referred to as an FET2) is connected to an L/S driver circuit 2, the drain is connected to the connection point between the FET1 and the inductor L1, and the source is grounded. The L/S driver circuit 2 is connected between the input terminal 3 and the ground. Furthermore, a capacitor C1 is connected between the connection point of the inductor L1 to the output terminal 4 and the ground. Moreover, an illustration of a comparator which detects the ripple of an output voltage Vout and supplies a FET switching signal to the H/S driver circuit 1 and the L/S driver circuit 2 is omitted.
In such a ripple converter, the voltages having waveforms shown in FIG. 6B are generated at point B and point A in FIG. 6A, such that the output characteristics of the FET1 and FET2 are reversed and synchronized therebetween. When the FET1 is turned on at point A (the FET2 is turned off), substantially the same voltage as the input voltage Vin is supplied at point A, and, when the FET1 is turned off (the FET2 is turned on), approximately zero volts (ground potential) are supplied at point A. Then, a voltage obtained by subtracting the voltage drop in the bootstrap diode D0 from the input voltage Vin is applied to the bootstrap capacitor C0, so as to charge the capacitor C0. Therefore, at point B, when the FET1 is turned on (the FET2 is turned off), a voltage increasing above the input voltage Vin by the electric charge charged in the bootstrap capacitor C0 is generated, and, when the FET1 is turned off (the FET2 is turned on), a voltage obtained by subtracting the voltage drop in the bootstrap diode D0 from the input voltage Vin is generated.
In such a structure, as described above, since an increased drive control voltage of the FET1 is generated from the H/S driver circuit 1, such that the charged bootstrap capacitor C0 is discharged, the FET1 must be repeatedly turned on and off. That is, the FET1 is not continuously in the on state and the FET1 must be switched on and off at a certain duty factor. Moreover, a duty factor mentioned here represents the ratio, expressed by percentage, of the time that the FET1 is in the on state all of the time, that is, if the FET1 is constantly in the on state, the duty factor is 100%.
However, as shown in FIG. 5, the ripple converter does not include any circuit for controlling a duty factor and the duty factor cannot be effectively controlled in principle. Therefore, when the input voltage Vin is decreased, the output voltage Vout does not reach the reference voltage Vo, and the FET1 is constantly in the on state, then, as a result, the bootstrap capacitor C0 is completely discharged. When the bootstrap capacitor C0 is discharged, the voltage across the capacitor C0 cannot be increased, a voltage required for the gate of the FET1 cannot be supplied, and as a result, the FET, is turned off. Therefore, the output voltage Vout is further reduced.
Thus, when the output voltage Vout is reduced, as described above, a voltage cannot be supplied from the bootstrap capacitor C0. Accordingly, the FET1 cannot be turned on, and the output voltage Vout is further reduced. That is, the FET1 cannot be stably operated such that the bootstrap capacitor is completely discharged.